The present invention relates to a disk control unit and, more particularly, to a control unit adapted for disk apparatus employing different disk formats.
In disk apparatus, a track is generally formed of a plurality of sectors each composed of an ID field, a DATA field and so forth. With regard to such sectors, there are known some different formats of disks such as hard sector disk and soft sector disk. When a plurality of disk apparatus of such different formats are mutually connected, a disk control unit is required for controlling the various disk apparatus which consequently bring about disadvantages including enlargement of the circuit scale and increase of the production cost.
In order to solve the problems mentioned, it has been customary heretofore to adopt a constitution where a disk control unit processes each field in a programmable manner, and different processing functions depending on the individual fields are absorbed by software while common functions are executed by hardware. Out of the conventional examples, there is known a constitution where, as disclosed in Japanese Patent Publication No. 57 (1982)-36614 titled "Data Processor", operation designating information is fed to a disk control unit from a micro program in such a manner that, when a different processing operation is required relative to one field, the desired operation is designated by the disk control unit in accordance with the field structure.
FIG. 1 shows a block diagram of the above conventional example. This unit is equipped with a controlling memory 3 having a plurality of storage positions, wherein a micro program controller 1 stores, in accordance with the field structure, a group of operation designating information at predetermined positions respectively in the controlling memory 3. With progress of the processing operation relative to the field, the controlling memory 3 sequentially reads out the information from such predetermined storage positions under control of an address controller 2. A command generator 4 generates commands to perform the operation designated by the individual operation designating information thus read out. A read/write controller 5 performs read and write operations for the disk appararus in response to the command generated. In this stage, the field length is determined by a value preset in a field length counter 6 by the micro program controller 1.
When a gap between the fields is sufficiently wide and the operation designating information is changeable, the micro program controller 1 is capable of storing the operation designating information required per field. However, if the gap is narrow, it is necessary to previously store the operation designating information for the entire fields prior to start of a series of operations. Meanwhile, with regard to the length of each field, it needs to be stored in the field length counter 6 at the time to execute the operation for each field.
Thus, the micro program controller 1 needs to monitor an end instruction for the field processing step per field. In case an input/output instruction is received from a host computer during execution of one processing step, such information is analyzed and, if the input/output instruction is not concerned with the disk apparatus being driven at the present moment, a seek operation and so forth need to be performed for enhancing the read/write efficiency. Therefore the control action of the micro program controller 1 is complicated to eventually necessitate enlarging the scale of the micro program memory incorporated in the micro program controller 1. Furthermore, in executing the steps to process sequential fields, it becomes unavoidable that the scale of the controlling memory 3 is rendered greater.
Meanwhile, in reading one field, an address mark recorded at the top of the field is detected to find the boundary between bytes, but such address mark has a fixed value. Accordingly, in order to obtain a different field structure by changing the address mark, it is necessary to store a multiplicity of address marks previously in an address mark processor 7, hence enlarging the circuit scale of the processor 7 as well.
When any field with ID information is written in the constitution of FIG. 1, the ID information is received directly from the host computer and then is written on a disk, but still it is necessary to maintain monitoring for the host computer to know the write timing. Furthermore, in a comparison of the ID information, such information are once loaded in the host computer and then are compared therein, whereby the efficiency is deteriorated.
In the prior art mentioned, there exist some problems including that no consideration is given with regard to simultaneous operation for a plurality of input/output instructions fed from the host computer or to sequential operations for the individual fields either, and the scales of both the micro program controller 1 and the controlling memory 3 are inevitably enlarged.
Besides the above, for obtaining a changed field structure with a different address mark which is initially fixed in each field, a multiplicity of address marks need to be previously stored to consequently bring about increase of the scale.
In addition, the write and comparison of fields including ID information are dependent much on the host computer to eventually deteriorate the processing efficiency of the host computer.